Core Tile for ARM11 MPCore

The Core Tile for ARM11MPCore is a compact development board based on the ARM11 MPCore test chip. This device incorporates four ARM11 MPCore processors, which can be used individually or together to evaluate ARM11 and ARM’s multiprocessing technology. The multiprocessor test chip combines very high processing performance with flexibility to adapt its power consumption to the performance requirements by turning off individual processors.

The ARM11 MPCore test chip has two AXI interfaces, which are routed to the Core Tile’s stacking connectors. The Core Tile has been designed to work on top of a baseboard that provides power and implements the memory system and peripherals. The test chip can be clocked at a much faster frequency than an FPGA or simulator model, which enables accelerated software development and debug. 

The reference baseboard for the Core Tile for ARM11 MPCore is the RealView Emulation Baseboard, although it can also be stacked on Logic Tiles or custom baseboards. Example RTL is provided to use the Core Tile on top of the Emulation Baseboard, which accelerates system prototyping and reduces time to market.

Features of the Core Tile for ARM11 MPCore

• Four ARM11 MPCore CPUs with VFP and 32KB L1 caches
• 1MB of unified L2 cache
• 2 external multiplexed AXI interfaces
• Tile form factor
• High density stacking connectors
• JTAG connection for processor run control and debug (via board below) 
• Power supply to generate the core voltage
• DACs and ADCs to control the CPU's voltage and measure its power consumption
  

System Performance

The maximum frequency of the processors and buses depends upon the test-chip fitted and the speed of the baseboard FPGA. Please refer to the release notes supplied with the board.

Stand-alone Operation

Core Tiles cannot be used stand-alone. They require a motherboard that provides power and a JTAG connector and implements a memory system. For example, a Core Tile and an Emulation Baseboard can be used together for software development and hardware prototyping.

Java Acceleration2

The ARM11 MPCore Core Tile contains ARM Jazelle™ Technology for Java acceleration. To make use of this Java acceleration hardware you will need some software running on the processor which incorporates parts of ARM's Java Technology Enabling Kit (JTEK).

If you are a Sun licensee who has also licensed ARM's JTEK (e.g. an OS vendor) or you are writing applications to run under an operating system, that already incorporates JTEK, then you will have everything you need to develop Java applications. However, if you do not fall into this category, you will be unable to make use of the Java acceleration hardware in the ARM1136JF-S.

Trace

The ARM11 MPCore test chip does not contain an Embedded Trace Macrocell (ETM).

Please note:

Core Tiles use ARM test-chips that are specially fabricated to validate new ARM designs and process technologies. These test-chips are provided by a variety of suppliers in small quantities. All test-chips used on Core Tiles are functionally tested by the manufacturer. However, the characteristics of the test-chips used on Core Tiles may vary for different manufacturing batches. ARM, therefore, cannot guarantee that characteristics including but not limited to clock speeds, cache configurations and TCM configurations will be the same from one Core Tile to the next.