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Platform Baseboard for ARM11 MPCore

The RealView® Platform Baseboard for the ARM11 MPCore (PB11MPCore) is a development board especially designed for Symmetric Multi-Processing application development.
Performance analysis, Operating System porting and custom peripheral driver development for SMP platforms is hence enabled.

Platform Baseboard for ARM11 MPCore image
Large Image

PB11MPCore is Micro ATX, self-powered, supplied in a case
                  View Front            View Back

The Platform Baseboard provides a quad ARM11 MPCore multiprocessor at near ASIC speed and a fast AMBA AXI memory system based on standard speed critical peripherals so as to enable Symmetric Multi-Processing software development at near real time.

PB11MPCore has a large amount of memory and a rich set of peripherals so as to enable standalone software development without adding further hardware. The baseboard is based on a structured ASIC implementing the AMBA AXI bus infrastructure, AXI memory system and peripherals controllers and a companion FPGA that handle the standard I/O communications.

Logic Tiles can be stacked on top of the Platform Baseboard to provide FPGA space to prototype custom peripherals.

In order to accelerate hardware and software development and reduce time to market the Platform Baseboard is delivered with example RTL, FPGA bit files, and example software that works with all existing Logic Tiles.

PB11MPCore Features and Benefits

ARM11 MPCore Test Chip

  • 4x ARM11 MPCore multiprocessors @210MHz
  • 32KB L1 I/D Caches, L2 1 MB unified cache

Structured ASIC (Northbridge Chip)

  • up to 100MHz
  • Color LCD
  • PCI
  • DMA
  • AMBA AXI Matrix
  • Memory interfaces

Companion FPGA

  • Xilinx Virtex-4 XC4VLX40 for standard I/O interfaces


  • 128MB NOR Flash
  • 2MB RAM

Baseboard Expansion

  • PISMO1TM  connector for adding memory modules
  • 1 Tile site for custom logic integration with Logic Tiles
  • 2x PCI slots and 2x PCI-Express connectors

Standard Frequency

  • Quad ARM11 MPCore Test chip @ 210MHz
  • Internal AXI up to 100MHz
  • External AXI up to 30MHz

PLDs programming

  • In-built hardware to program the FPGAs and PLDs of the system with a USB cable
  • 'progcards' utility for PLDs image selection & downloading
  • Configuration JTAG Chain


  • JTAG RealView ICE port
  • Debug JTAG Chain


  • 10/100 Ethernet MAC
  • 32-bit PCI controller
  • 32-bit DDR SDRAM controller
  • 32-bit Asynchronous SRAM controller
  • 32-bit NOR Flash controller
  • 4 x UARTs, 1 x Synchronous Serial Port
  • 16 GPIO pins, user LEDs, 8 user switches
  • High speed USB OTG v2.0 and USB Host
  • SmartCard, Compact Flash, Multimedia/SD card controller
  • Keyboard and mouse interfaces
  • Stereo audio in/out and microphone
  • Generic Interrupt controller
  • DVI
  • Real Time Clock
  • Watchdog, Dual Timers

Supported OS and Board Support Packages

ARM SMP Linux  is ported to the PB11MPCore. Please contact ARM for availability of other OS ports to the PB11MPCore.

Support CD

Example software for all the peripherals on the board except USB is provided with the board or can be obtained from the chipset manufacturer's website.

  • Firmware
    • System and memory initialization code
    • NOR Flash memory read, write and erase code
    • Peripheral functional test program
    • Network Flash Utility for flash programming from Ethernet
    • C library support for stand-alone and semi-hosted images
  • Pre-built binaries (little-Endian only) 
    • Boot monitor
    • Selftest
  • Hardware (little-Endian only) 
    • FPGA Image BIT file for baseboard FPGA
    • RTL & bit file for example AXI expansion design on Logic Tiles
  • Documentation
 Software Development

 Logic Tile for the Xilinx Virtex-5 FPGA >> 
 Logic Tile for Xilinx Virtex-4 FPGAs >> 
 Logic Tiles for Xilinx Virtex-II FPGAs >> 
 Interface Tile 1 >> 
 Analyzer Tile 1 >> 


Datasheet (5803Kb.pdf)

PISMO web site

RealView Hardware Platform Flyer (588KB .pdf)

AMBA AXI expansion reference design
Related FAQs
*Can I stack Logic Tiles?

*Why doesn't my AXI peripheral work?

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