Example libhpm Output

libhpm (Version 2.3.1) summary - running on POWER3-II Total execution time of instrumented code (wall time): 72.159621 seconds ######## Resource Usage Statistics ######## Total amount of time in user mode : 137.910000 seconds Total amount of time in system mode : 41.230000 seconds Maximum resident set size : 25532 Kbytes Average shared memory use in text segment : 1933824 Kbytes*sec Average unshared memory use in data segment : 349943160 Kbytes*sec Number of page faults without I/O activity : 6701 Number of page faults with I/O activity : 15 Number of times process was swapped out : 0 Number of times file system performed INPUT : 0 Number of times file system performed OUTPUT : 0 Number of IPC messages sent : 0 Number of IPC messages received : 0 Number of signals delivered : 0 Number of voluntary context switches : 305943 Number of involuntary context switches : 2521802 ####### End of Resource Statistics ######## Instrumented section: 1 - Label: Calc1 - process: 0 file: swim.f, lines: 132 <--> 134 Count: 2400 Wall Clock Time: 27.806495 seconds Total time in user mode: 45.9568873310262 seconds Average duration: 0.011586 Standard deviation: 0.00993461 Exclusive duration: 0.190541 seconds PM_CYC (Cycles) : 17235784093 PM_LD_DISP (Loads dispatched) : 3682683109 PM_LD_MISS_L2HIT (Load misses in L1) : 225177529 PM_BIU_LD_NORTRY (Master generated load op not retried) : 43013674 PM_ST_DISP (Stores dispatched) : 1108254868 PM_ST_L2MISS (Stores misses in L2) : 32412857 PM_CMPLU_WT_LD (Completion unit waiting on load) : 2355302045 PM_LSU_IDLE (Load store unit idle) : 5655636336 Utilization rate : 165.265 % Load and store operations : 4790.938 M Avg number of loads per load miss : 16.355 Avg number of loads per L2 load miss : 85.617 Avg number of stores per L2 store miss : 34.192 Avg number of load/stores per D2 miss : 63.518 Avg number of L1 LD misses per L2 LD miss : 5.235 % Cycles LSU is idle : 32.813 % Instrumented section: 2 - Label: Calc2 - process: 0 file: swim.f, lines: 138 <--> 140 Count: 2400 Wall Clock Time: 24.1871730000001 seconds Total time in user mode: 49.7433414722922 seconds Average duration: 0.010078 Standard deviation: 0.00778173 Exclusive duration: 4.10437 seconds PM_CYC (Cycles) : 18655940311 PM_LD_DISP (Loads dispatched) : 4255625924 PM_LD_MISS_L2HIT (Load misses in L1) : 235442324 PM_BIU_LD_NORTRY (Master generated load op not retried) : 76098500 PM_ST_DISP (Stores dispatched) : 934218689 PM_ST_L2MISS (Stores misses in L2) : 29426604 PM_CMPLU_WT_LD (Completion unit waiting on load) : 12468793146 PM_LSU_IDLE (Load store unit idle) : 4372321395 Utilization rate : 205.650 % Load and store operations : 5189.845 M Avg number of loads per load miss : 18.075 Avg number of loads per L2 load miss : 55.923 Avg number of stores per L2 store miss : 31.747 Avg number of load/stores per D2 miss : 49.181 Avg number of L1 LD misses per L2 LD miss : 3.094 % Cycles LSU is idle : 23.437 % Instrumented section: 3 - Label: Calc3 - process: 0 file: swim.f, lines: 210 <--> 212 Count: 2398 Wall Clock Time: 19.851623 seconds Total time in user mode: 38.1383583082283 seconds Average duration: 0.00827841 Standard deviation: 0.00691513 Exclusive duration: 5.84863 seconds PM_CYC (Cycles) : 14303349336 PM_LD_DISP (Loads dispatched) : 2318397133 PM_LD_MISS_L2HIT (Load misses in L1) : 94386950 PM_BIU_LD_NORTRY (Master generated load op not retried) : 73729608 PM_ST_DISP (Stores dispatched) : 1096309882 PM_ST_L2MISS (Stores misses in L2) : 6605675 PM_CMPLU_WT_LD (Completion unit waiting on load) : 10613575618 PM_LSU_IDLE (Load store unit idle) : 1215479129 Utilization rate : 192.105 % Load and store operations : 3414.707 M Avg number of loads per load miss : 24.563 Avg number of loads per L2 load miss : 31.445 Avg number of stores per L2 store miss : 165.965 Avg number of load/stores per D2 miss : 42.506 Avg number of L1 LD misses per L2 LD miss : 1.280 % Cycles LSU is idle : 8.498 % Instrumented section: 4 - Label: Calc3z - process: 0 file: swim.f, lines: 206 <--> 208 Count: 1 Wall Clock Time: 0.013437 seconds Total time in user mode: 0.013364624845464 seconds PM_CYC (Cycles) : 5012187 PM_LD_DISP (Loads dispatched) : 397474 PM_LD_MISS_L2HIT (Load misses in L1) : 24877 PM_BIU_LD_NORTRY (Master generated load op not retried) : 37104 PM_ST_DISP (Stores dispatched) : 397078 PM_ST_L2MISS (Stores misses in L2) : 11980 PM_CMPLU_WT_LD (Completion unit waiting on load) : 4458541 PM_LSU_IDLE (Load store unit idle) : 5540 Utilization rate : 99.454 % Load and store operations : 0.795 M Avg number of loads per load miss : 15.978 Avg number of loads per L2 load miss : 10.712 Avg number of stores per L2 store miss : 33.145 Avg number of load/stores per D2 miss : 16.188 Avg number of L1 LD misses per L2 LD miss : 0.670 % Cycles LSU is idle : 0.111 % Instrumented section: 5 - Label: Inital - process: 0 file: swim.f, lines: 98 <--> 100 Count: 1 Wall Clock Time: 0.096794 seconds Total time in user mode: 0.0538142322780211 seconds PM_CYC (Cycles) : 20183310 PM_LD_DISP (Loads dispatched) : 5731665 PM_LD_MISS_L2HIT (Load misses in L1) : 18500 PM_BIU_LD_NORTRY (Master generated load op not retried) : 15881 PM_ST_DISP (Stores dispatched) : 1202214 PM_ST_L2MISS (Stores misses in L2) : 56 PM_CMPLU_WT_LD (Completion unit waiting on load) : 2458463 PM_LSU_IDLE (Load store unit idle) : 9099167 Utilization rate : 55.596 % Load and store operations : 6.934 M Avg number of loads per load miss : 309.820 Avg number of loads per L2 load miss : 360.913 Avg number of stores per L2 store miss : 21468.107 Avg number of load/stores per D2 miss : 435.081 Avg number of L1 LD misses per L2 LD miss : 1.165 % Cycles LSU is idle : 45.083 % Instrumented section: 8 - Label: MPI Calc1 start - process: 0 file: calc1.f, lines: 31 <--> 54 Count: 2400 Wall Clock Time: 12.560338 seconds Total time in user mode: 12.4567201947954 seconds Average duration: 0.00523347 Standard deviation: 0.00875754 PM_CYC (Cycles) : 4671134189 PM_LD_DISP (Loads dispatched) : 1355681148 PM_LD_MISS_L2HIT (Load misses in L1) : 1179182 PM_BIU_LD_NORTRY (Master generated load op not retried) : 696774 PM_ST_DISP (Stores dispatched) : 306593168 PM_ST_L2MISS (Stores misses in L2) : 12844 PM_CMPLU_WT_LD (Completion unit waiting on load) : 776530520 PM_LSU_IDLE (Load store unit idle) : 2088317854 Utilization rate : 99.156 % Load and store operations : 1662.274 M Avg number of loads per load miss : 1149.679 Avg number of loads per L2 load miss : 1945.654 Avg number of stores per L2 store miss : 23870.536 Avg number of load/stores per D2 miss : 2342.492 Avg number of L1 LD misses per L2 LD miss : 1.692 % Cycles LSU is idle : 44.707 % Instrumented section: 10 - Label: Loop 100 - process: 0 file: calc1.f, lines: 56 <--> 77 Count: 2400 Wall Clock Time: 7.93737800000002 seconds Total time in user mode: 25.8194839308098 seconds Average duration: 0.00330724 Standard deviation: 0.00390991 PM_CYC (Cycles) : 9683003157 PM_LD_DISP (Loads dispatched) : 1608514060 PM_LD_MISS_L2HIT (Load misses in L1) : 216166630 PM_BIU_LD_NORTRY (Master generated load op not retried) : 39106539 PM_ST_DISP (Stores dispatched) : 621942096 PM_ST_L2MISS (Stores misses in L2) : 31302815 PM_CMPLU_WT_LD (Completion unit waiting on load) : 905008171 PM_LSU_IDLE (Load store unit idle) : 2413330053 Utilization rate : 325.259 % Load and store operations : 2230.456 M Avg number of loads per load miss : 7.441 Avg number of loads per L2 load miss : 41.132 Avg number of stores per L2 store miss : 19.869 Avg number of load/stores per D2 miss : 31.678 Avg number of L1 LD misses per L2 LD miss : 5.528 % Cycles LSU is idle : 24.923 % Instrumented section: 11 - Label: loop 110 - process: 0 file: calc1.f, lines: 83 <--> 96 Count: 2400 Wall Clock Time: 0.688888000000001 seconds Total time in user mode: 0.672188659428198 seconds Average duration: 0.000287037 Standard deviation: 1.60712e-05 PM_CYC (Cycles) : 251200628 PM_LD_DISP (Loads dispatched) : 7076162 PM_LD_MISS_L2HIT (Load misses in L1) : 1095105 PM_BIU_LD_NORTRY (Master generated load op not retried) : 1237123 PM_ST_DISP (Stores dispatched) : 1714340 PM_ST_L2MISS (Stores misses in L2) : 358743 PM_CMPLU_WT_LD (Completion unit waiting on load) : 203449683 PM_LSU_IDLE (Load store unit idle) : 21581910 Utilization rate : 97.223 % Load and store operations : 8.791 M Avg number of loads per load miss : 6.462 Avg number of loads per L2 load miss : 5.720 Avg number of stores per L2 store miss : 4.779 Avg number of load/stores per D2 miss : 5.508 Avg number of L1 LD misses per L2 LD miss : 0.885 % Cycles LSU is idle : 8.592 % Instrumented section: 19 - Label: MPI Calc1 end - process: 0 file: calc1.f, lines: 97 <--> 160 Count: 2400 Wall Clock Time: 6.42935000000001 seconds Total time in user mode: 6.3460375443488 seconds Average duration: 0.0026789 Standard deviation: 0.00541438 PM_CYC (Cycles) : 2379247469 PM_LD_DISP (Loads dispatched) : 673673139 PM_LD_MISS_L2HIT (Load misses in L1) : 1751680 PM_BIU_LD_NORTRY (Master generated load op not retried) : 1016098 PM_ST_DISP (Stores dispatched) : 162692223 PM_ST_L2MISS (Stores misses in L2) : 31416 PM_CMPLU_WT_LD (Completion unit waiting on load) : 437175965 PM_LSU_IDLE (Load store unit idle) : 1055745054 Utilization rate : 98.666 % Load and store operations : 836.365 M Avg number of loads per load miss : 384.587 Avg number of loads per L2 load miss : 663.000 Avg number of stores per L2 store miss : 5178.642 Avg number of load/stores per D2 miss : 798.429 Avg number of L1 LD misses per L2 LD miss : 1.724 % Cycles LSU is idle : 44.373 % Instrumented section: 20 - Label: Loop 200 - process: 0 file: calc2.f, lines: 67 <--> 87 Count: 2400 Wall Clock Time: 11.917436 seconds Total time in user mode: 6.24314235204202 seconds Average duration: 0.0049656 Standard deviation: 0.00492012 PM_CYC (Cycles) : 2340655361 PM_LD_DISP (Loads dispatched) : 595390310 PM_LD_MISS_L2HIT (Load misses in L1) : 38808488 PM_BIU_LD_NORTRY (Master generated load op not retried) : 11570869 PM_ST_DISP (Stores dispatched) : 122758277 PM_ST_L2MISS (Stores misses in L2) : 4936556 PM_CMPLU_WT_LD (Completion unit waiting on load) : 1697889807 PM_LSU_IDLE (Load store unit idle) : 375172828 Utilization rate : 52.366 % Load and store operations : 718.149 M Avg number of loads per load miss : 15.342 Avg number of loads per L2 load miss : 51.456 Avg number of stores per L2 store miss : 24.867 Avg number of load/stores per D2 miss : 43.505 Avg number of L1 LD misses per L2 LD miss : 3.354 % Cycles LSU is idle : 16.029 % Instrumented section: 21 - Label: Loop 200 - process: 0 file: calc2.f, lines: 67 <--> 87 Count: 2400 Wall Clock Time: 10.965022 seconds Total time in user mode: 6.60890535507161 seconds Average duration: 0.00456876 Standard deviation: 0.00470217 PM_CYC (Cycles) : 2477839276 PM_LD_DISP (Loads dispatched) : 535513103 PM_LD_MISS_L2HIT (Load misses in L1) : 37718743 PM_BIU_LD_NORTRY (Master generated load op not retried) : 11950927 PM_ST_DISP (Stores dispatched) : 118937488 PM_ST_L2MISS (Stores misses in L2) : 4822954 PM_CMPLU_WT_LD (Completion unit waiting on load) : 1952354647 PM_LSU_IDLE (Load store unit idle) : 491377427 Utilization rate : 60.250 % Load and store operations : 654.451 M Avg number of loads per load miss : 14.198 Avg number of loads per L2 load miss : 44.809 Avg number of stores per L2 store miss : 24.661 Avg number of load/stores per D2 miss : 39.016 Avg number of L1 LD misses per L2 LD miss : 3.156 % Cycles LSU is idle : 19.831 % Instrumented section: 22 - Label: Loop 200 - process: 0 file: calc2.f, lines: 67 <--> 87 Count: 2400 Wall Clock Time: 11.050013 seconds Total time in user mode: 6.62711967815587 seconds Average duration: 0.00460417 Standard deviation: 0.00467792 PM_CYC (Cycles) : 2484670782 PM_LD_DISP (Loads dispatched) : 539837703 PM_LD_MISS_L2HIT (Load misses in L1) : 37865457 PM_BIU_LD_NORTRY (Master generated load op not retried) : 11868295 PM_ST_DISP (Stores dispatched) : 119369550 PM_ST_L2MISS (Stores misses in L2) : 4827359 PM_CMPLU_WT_LD (Completion unit waiting on load) : 1954529790 PM_LSU_IDLE (Load store unit idle) : 484736170 Utilization rate : 59.952 % Load and store operations : 659.207 M Avg number of loads per load miss : 14.257 Avg number of loads per L2 load miss : 45.486 Avg number of stores per L2 store miss : 24.728 Avg number of load/stores per D2 miss : 39.484 Avg number of L1 LD misses per L2 LD miss : 3.190 % Cycles LSU is idle : 19.509 % Instrumented section: 23 - Label: Loop 200 - process: 0 file: calc2.f, lines: 67 <--> 87 Count: 2400 Wall Clock Time: 11.094095 seconds Total time in user mode: 6.75234222218093 seconds Average duration: 0.00462254 Standard deviation: 0.00470161 PM_CYC (Cycles) : 2531637038 PM_LD_DISP (Loads dispatched) : 539555444 PM_LD_MISS_L2HIT (Load misses in L1) : 38264669 PM_BIU_LD_NORTRY (Master generated load op not retried) : 11871675 PM_ST_DISP (Stores dispatched) : 120089893 PM_ST_L2MISS (Stores misses in L2) : 4838552 PM_CMPLU_WT_LD (Completion unit waiting on load) : 1974496236 PM_LSU_IDLE (Load store unit idle) : 495875414 Utilization rate : 60.842 % Load and store operations : 659.645 M Avg number of loads per load miss : 14.101 Avg number of loads per L2 load miss : 45.449 Avg number of stores per L2 store miss : 24.819 Avg number of load/stores per D2 miss : 39.476 Avg number of L1 LD misses per L2 LD miss : 3.223 % Cycles LSU is idle : 19.587 % Instrumented section: 24 - Label: Loop 200 - process: 0 file: calc2.f, lines: 67 <--> 87 Count: 2400 Wall Clock Time: 11.000995 seconds Total time in user mode: 6.7813525702083 seconds Average duration: 0.00458375 Standard deviation: 0.00469502 PM_CYC (Cycles) : 2542517726 PM_LD_DISP (Loads dispatched) : 539904214 PM_LD_MISS_L2HIT (Load misses in L1) : 38749146 PM_BIU_LD_NORTRY (Master generated load op not retried) : 12083863 PM_ST_DISP (Stores dispatched) : 120253170 PM_ST_L2MISS (Stores misses in L2) : 4860861 PM_CMPLU_WT_LD (Completion unit waiting on load) : 1984980061 PM_LSU_IDLE (Load store unit idle) : 503936528 Utilization rate : 61.621 % Load and store operations : 660.157 M Avg number of loads per load miss : 13.933 Avg number of loads per L2 load miss : 44.680 Avg number of stores per L2 store miss : 24.739 Avg number of load/stores per D2 miss : 38.959 Avg number of L1 LD misses per L2 LD miss : 3.207 % Cycles LSU is idle : 19.820 % Instrumented section: 25 - Label: Loop 200 - process: 0 file: calc2.f, lines: 67 <--> 87 Count: 2400 Wall Clock Time: 11.780886 seconds Total time in user mode: 6.32426744671129 seconds Average duration: 0.0049087 Standard deviation: 0.00491015 PM_CYC (Cycles) : 2371082326 PM_LD_DISP (Loads dispatched) : 550422250 PM_LD_MISS_L2HIT (Load misses in L1) : 36488822 PM_BIU_LD_NORTRY (Master generated load op not retried) : 10730156 PM_ST_DISP (Stores dispatched) : 114433474 PM_ST_L2MISS (Stores misses in L2) : 4625269 PM_CMPLU_WT_LD (Completion unit waiting on load) : 1809089803 PM_LSU_IDLE (Load store unit idle) : 478116310 Utilization rate : 53.662 % Load and store operations : 664.856 M Avg number of loads per load miss : 15.085 Avg number of loads per L2 load miss : 51.297 Avg number of stores per L2 store miss : 24.741 Avg number of load/stores per D2 miss : 43.298 Avg number of L1 LD misses per L2 LD miss : 3.401 % Cycles LSU is idle : 20.164 % Instrumented section: 28 - Label: MPI Calc2 start - process: 0 file: calc2.f, lines: 31 <--> 60 Count: 2400 Wall Clock Time: 2.681251 seconds Total time in user mode: 2.60760514176438 seconds Average duration: 0.00111719 Standard deviation: 0.00332285 PM_CYC (Cycles) : 977102395 PM_LD_DISP (Loads dispatched) : 269604052 PM_LD_MISS_L2HIT (Load misses in L1) : 1415210 PM_BIU_LD_NORTRY (Master generated load op not retried) : 837198 PM_ST_DISP (Stores dispatched) : 71474156 PM_ST_L2MISS (Stores misses in L2) : 16395 PM_CMPLU_WT_LD (Completion unit waiting on load) : 189724474 PM_LSU_IDLE (Load store unit idle) : 413934612 Utilization rate : 97.163 % Load and store operations : 341.078 M Avg number of loads per load miss : 190.505 Avg number of loads per L2 load miss : 322.031 Avg number of stores per L2 store miss : 4359.509 Avg number of load/stores per D2 miss : 399.579 Avg number of L1 LD misses per L2 LD miss : 1.690 % Cycles LSU is idle : 42.363 % Instrumented section: 29 - Label: MPI Calc2 end - process: 0 file: calc2.f, lines: 103 <--> 159 Count: 2400 Wall Clock Time: 5.484113 seconds Total time in user mode: 5.39081171060366 seconds Average duration: 0.00228505 Standard deviation: 0.00504895 PM_CYC (Cycles) : 2020978266 PM_LD_DISP (Loads dispatched) : 571879990 PM_LD_MISS_L2HIT (Load misses in L1) : 1396090 PM_BIU_LD_NORTRY (Master generated load op not retried) : 715941 PM_ST_DISP (Stores dispatched) : 136537271 PM_ST_L2MISS (Stores misses in L2) : 26399 PM_CMPLU_WT_LD (Completion unit waiting on load) : 367201656 PM_LSU_IDLE (Load store unit idle) : 903192760 Utilization rate : 98.254 % Load and store operations : 708.417 M Avg number of loads per load miss : 409.630 Avg number of loads per L2 load miss : 798.781 Avg number of stores per L2 store miss : 5172.062 Avg number of load/stores per D2 miss : 954.303 Avg number of L1 LD misses per L2 LD miss : 1.950 % Cycles LSU is idle : 44.691 % Instrumented section: 30 - Label: Loop 300 - process: 0 file: calc3.f, lines: 35 <--> 46 Count: 2398 Wall Clock Time: 9.18391200000002 seconds Total time in user mode: 4.93333205265723 seconds Average duration: 0.00382982 Standard deviation: 0.00448753 PM_CYC (Cycles) : 1849395651 PM_LD_DISP (Loads dispatched) : 303534342 PM_LD_MISS_L2HIT (Load misses in L1) : 15680217 PM_BIU_LD_NORTRY (Master generated load op not retried) : 11231806 PM_ST_DISP (Stores dispatched) : 165063104 PM_ST_L2MISS (Stores misses in L2) : 7563 PM_CMPLU_WT_LD (Completion unit waiting on load) : 1538774052 PM_LSU_IDLE (Load store unit idle) : 57726975 Utilization rate : 53.691 % Load and store operations : 468.597 M Avg number of loads per load miss : 19.358 Avg number of loads per L2 load miss : 27.025 Avg number of stores per L2 store miss : 21825.083 Avg number of load/stores per D2 miss : 41.693 Avg number of L1 LD misses per L2 LD miss : 1.396 % Cycles LSU is idle : 3.121 % Instrumented section: 31 - Label: Loop 300 - process: 0 file: calc3.f, lines: 35 <--> 46 Count: 2398 Wall Clock Time: 8.85504299999999 seconds Total time in user mode: 4.90141497424008 seconds Average duration: 0.00369268 Standard deviation: 0.00446677 PM_CYC (Cycles) : 1837424758 PM_LD_DISP (Loads dispatched) : 279892558 PM_LD_MISS_L2HIT (Load misses in L1) : 15146855 PM_BIU_LD_NORTRY (Master generated load op not retried) : 10832246 PM_ST_DISP (Stores dispatched) : 160186637 PM_ST_L2MISS (Stores misses in L2) : 2996 PM_CMPLU_WT_LD (Completion unit waiting on load) : 1555369400 PM_LSU_IDLE (Load store unit idle) : 38606632 Utilization rate : 55.324 % Load and store operations : 440.079 M Avg number of loads per load miss : 18.479 Avg number of loads per L2 load miss : 25.839 Avg number of stores per L2 store miss : 53466.835 Avg number of load/stores per D2 miss : 40.616 Avg number of L1 LD misses per L2 LD miss : 1.398 % Cycles LSU is idle : 2.101 % Instrumented section: 32 - Label: Loop 300 - process: 0 file: calc3.f, lines: 35 <--> 46 Count: 2398 Wall Clock Time: 8.71346199999998 seconds Total time in user mode: 4.93259766000745 seconds Average duration: 0.00363364 Standard deviation: 0.00435994 PM_CYC (Cycles) : 1849120208 PM_LD_DISP (Loads dispatched) : 282807759 PM_LD_MISS_L2HIT (Load misses in L1) : 15189273 PM_BIU_LD_NORTRY (Master generated load op not retried) : 10851685 PM_ST_DISP (Stores dispatched) : 160687002 PM_ST_L2MISS (Stores misses in L2) : 2901 PM_CMPLU_WT_LD (Completion unit waiting on load) : 1563872404 PM_LSU_IDLE (Load store unit idle) : 39262837 Utilization rate : 56.581 % Load and store operations : 443.495 M Avg number of loads per load miss : 18.619 Avg number of loads per L2 load miss : 26.061 Avg number of stores per L2 store miss : 55390.211 Avg number of load/stores per D2 miss : 40.858 Avg number of L1 LD misses per L2 LD miss : 1.400 % Cycles LSU is idle : 2.123 % Instrumented section: 33 - Label: Loop 300 - process: 0 file: calc3.f, lines: 35 <--> 46 Count: 2398 Wall Clock Time: 8.405739 seconds Total time in user mode: 4.85004670090747 seconds Average duration: 0.00350531 Standard deviation: 0.00414053 PM_CYC (Cycles) : 1818158455 PM_LD_DISP (Loads dispatched) : 276709266 PM_LD_MISS_L2HIT (Load misses in L1) : 15071518 PM_BIU_LD_NORTRY (Master generated load op not retried) : 10757577 PM_ST_DISP (Stores dispatched) : 159417230 PM_ST_L2MISS (Stores misses in L2) : 3004 PM_CMPLU_WT_LD (Completion unit waiting on load) : 1538714957 PM_LSU_IDLE (Load store unit idle) : 37158456 Utilization rate : 57.670 % Load and store operations : 436.126 M Avg number of loads per load miss : 18.360 Avg number of loads per L2 load miss : 25.722 Avg number of stores per L2 store miss : 53068.319 Avg number of load/stores per D2 miss : 40.530 Avg number of L1 LD misses per L2 LD miss : 1.401 % Cycles LSU is idle : 2.044 % Instrumented section: 34 - Label: Loop 300 - process: 0 file: calc3.f, lines: 35 <--> 46 Count: 2398 Wall Clock Time: 8.78583100000001 seconds Total time in user mode: 4.97160953031524 seconds Average duration: 0.00366382 Standard deviation: 0.00445842 PM_CYC (Cycles) : 1863752090 PM_LD_DISP (Loads dispatched) : 281021696 PM_LD_MISS_L2HIT (Load misses in L1) : 15205714 PM_BIU_LD_NORTRY (Master generated load op not retried) : 10999163 PM_ST_DISP (Stores dispatched) : 160751690 PM_ST_L2MISS (Stores misses in L2) : 7777 PM_CMPLU_WT_LD (Completion unit waiting on load) : 1580003921 PM_LSU_IDLE (Load store unit idle) : 38210491 Utilization rate : 56.559 % Load and store operations : 441.773 M Avg number of loads per load miss : 18.481 Avg number of loads per L2 load miss : 25.549 Avg number of stores per L2 store miss : 20670.141 Avg number of load/stores per D2 miss : 40.136 Avg number of L1 LD misses per L2 LD miss : 1.382 % Cycles LSU is idle : 2.050 % Instrumented section: 35 - Label: Loop 300 - process: 0 file: calc3.f, lines: 35 <--> 46 Count: 2398 Wall Clock Time: 8.81364900000001 seconds Total time in user mode: 4.70463962780797 seconds Average duration: 0.00367542 Standard deviation: 0.00443814 PM_CYC (Cycles) : 1763621743 PM_LD_DISP (Loads dispatched) : 281200027 PM_LD_MISS_L2HIT (Load misses in L1) : 14046836 PM_BIU_LD_NORTRY (Master generated load op not retried) : 9860154 PM_ST_DISP (Stores dispatched) : 148567363 PM_ST_L2MISS (Stores misses in L2) : 6874 PM_CMPLU_WT_LD (Completion unit waiting on load) : 1479036425 PM_LSU_IDLE (Load store unit idle) : 58084438 Utilization rate : 53.351 % Load and store operations : 429.767 M Avg number of loads per load miss : 20.019 Avg number of loads per L2 load miss : 28.519 Avg number of stores per L2 store miss : 21612.942 Avg number of load/stores per D2 miss : 43.556 Avg number of L1 LD misses per L2 LD miss : 1.425 % Cycles LSU is idle : 3.293 % Instrumented section: 38 - Label: MPI in Calc3 - process: 0 file: calc3.f, lines: 63 <--> 136 Count: 2398 Wall Clock Time: 4.819083 seconds Total time in user mode: 4.72106153402966 seconds Average duration: 0.00200963 Standard deviation: 0.00464226 PM_CYC (Cycles) : 1769780981 PM_LD_DISP (Loads dispatched) : 494901906 PM_LD_MISS_L2HIT (Load misses in L1) : 2447669 PM_BIU_LD_NORTRY (Master generated load op not retried) : 1409010 PM_ST_DISP (Stores dispatched) : 127950328 PM_ST_L2MISS (Stores misses in L2) : 53517 PM_CMPLU_WT_LD (Completion unit waiting on load) : 353724172 PM_LSU_IDLE (Load store unit idle) : 739866222 Utilization rate : 97.916 % Load and store operations : 622.852 M Avg number of loads per load miss : 202.193 Avg number of loads per L2 load miss : 351.241 Avg number of stores per L2 store miss : 2390.835 Avg number of load/stores per D2 miss : 425.874 Avg number of L1 LD misses per L2 LD miss : 1.737 % Cycles LSU is idle : 41.806 % : 17.395