This section describes the Synergistic Processor Element (SPE) user registers.
The complete set of SPE user registers is shown in Figure 1.
All computational instructions operate only on registers—there are no computational
instructions that modify storage. The SPE registers include:
- General-Purpose Registers (GPRs) — All data types can be stored in the 128-bit GPRs, of which there are 128.
- Floating-Point Status and Control Register (FPSCR) — The processor updates the 128-bit FPSCR after every floating-point operation to record information about the result and any associated exceptions.
