TIMING ANALYZER

 

 

Timing Analyzer (TA) Functioning:

The Timing Analyzer (TA) provides accurate bounds on the WCET of a function/entire program. It takes the input from the static cache simulator and the PCompiler and constructs a timing analysis tree and computes the worst case instruction cache performance for each loop in the tree. A TA tree represents the set of all possible paths through a loop.

 

  The main functions implemented to find the WCET are:

a)              Create_Timing_Path and Build_Timing_Tree: These functions create the TA tree and fill in the information given in the INF file.

b)              Batch_Time: This function calls the Time_Best_Case and the Time_Worst_Case timing functions recursively to determine the best and the worst case timing bounds. This is done until all nodes are timed.

c)               Time_Worst_Case: This function scans over the timing tree and times all the paths for the worst case execution cycles.

d)              Time_Best_Case: This function scans over the timing tree and times all the paths for the best case execution cycles.

e)           Time_Path: The Time_Path function is the most important function in the timing analyzer. The function goes through all   
       the instructions in the path specified and returns the number of cycles that will be required for the path, to the calling  
       functions.
 
To calculate the WCET, the TA requires the architectural features of the IBM PowerPC 750CX such as the number of pipeline stages, instruction latencies, cache configuration, number of registers and the like.
 
The IBM PowerPC has 4 pipeline stages namely:
a)         Instruction Fetch
b)        Instruction Decode/Dispatch
c)         Execute
d)        Write-Back
 
The instruction latencies (i.e. number of cycles an instruction spends in the Execution Unit, as given in the data sheet)
is used to time the best case and worst case cycles of an instruction.
The link for the timing latencies of instructions are:
a)         worst_stages_ppc
b)        best_stages_ppc
 
The header file instdef.h contains the information about the Architectrure like the pipeline stages and instruction set.
The link to the file is:
instdef.h 
 
The file isa_ppc.cpp contains the general purpose function definitions required for the timing analysis of IBM PowerPC750Cx.
The link to the file is:
isa_ppc.cpp
 
The other TA files tree.cpp and path.cpp contain those functions required for the maintenance of the tree and paths such as creation, addition and deletion.
a)         tree.cpp
b)        path.cpp
   
    The file time.cpp is the main file which implements the Timing Analyzer.
    time.cpp