While caches have become invaluable for higher-end architectures due to their 
ability to hide, in part, the gap between processor speed and memory access 
times, caches (and particularly data caches) limit the timing predictability 
for data accesses that may reside in memory or in cache. This is a significant
problem for real-time systems.

The objective our work is to provide accurate predictions of data cache 
behavior of scalar and non-scalar references whose reference patterns are 
known at compile time. Such knowledge about cache behavior provides the basis 
for significant improvements in bounding the worst-case execution time (WCET) 
of real-time programs, particularly for hard-to-analyze data caches.

We exploit the power of the Cache Miss Equations (CME) framework but lift a 
number of limitations of traditional CME to generalize the analysis to more 
arbitrary programs. We further devised a transformation, coined ``forced'' 
loop fusion, which facilitates the analysis across sequential loops. Our 
contributions result in exact data cache reference patterns --- in contrast 
to approximate cache miss behavior of prior work. Experimental results indicate
 improvements on the accuracy of worst-case data cache behavior up to two 
orders of magnitude over the original approach. In fact, our results closely 
bound and sometimes even exactly match those obtained by trace-driven 
simulation for worst-case inputs. The resulting WCET bounds of timing analysis
 confirm these findings in terms of providing tight bounds. Overall, our 
contributions lift analytical approaches to predict data cache behavior to a 
level suitable for efficient static timing analysis and, subsequently, 
real-time schedulability of tasks with predictable WCET.