Embedded systems are often subject to constraints that require determinism to ensure that task deadlines are met. Such systems are referred to as real-time systems. Schedulability analysis provides a firm basis to ensure that tasks meet their deadlines for which knowledge of worst-case execution time (WCET) bounds is a critical piece of information. Static timing analysis techniques are used to derive these WCET bounds. A limiting factor for designing real-time systems is the class of processors that can be used. Typically, modern, complex processor pipelines cannot be used in real-time systems design. Contemporary processors with their advanced architectural features, such as out-of-order execution, branch prediction, speculation, prefetching, {\em etc.}, cannot be statically analyzed to obtain {\bf tight} WCET bounds for tasks. This is caused by the non-determinism of these features, which surfaces in full only at runtime.
In this paper, we introduce a new paradigm to perform timing analysis of tasks for real-time systems running on modern processor architectures. We propose minor enhancements to the processor architecture to enable this process. These features, on interaction with software modules, are able to obtain tight, accurate timing analysis results for modern processors. We also briefly present analysis techniques that, combined with our timing analysis methods, reduce the complexity of worst-case estimations for loops. To the best of our knowledge, this method of constant interactions between hardware and software to calculate WCET bounds for out-of-order processors is the first of its kind.
Sibin Mohan is a final year Ph.D. student in the Department of Computer Science at North Carolina State University. He works in the field of real-time and embedded systems. His research focus is on improved analysis techniques to characterize the worst-case behavior of time-critical systems, particularly for contemporary architectures.
Sibin completed his Bachelor of Engineering (BE) from Bangalore University, India in Computer Science and Engineering in 2001. He worked with Hewlett-Packard for a year before enrolling in the doctoral program at NC state in 2002, where he obtained his MS in Computer Science in 2004.
Sibin is the recipient of the "Preparing the Professoriate" fellowship from the Graduate School at North Carolina State University for the 2007 - 2008 academic year. He has interned with Microsoft Research and Qualcomm. He is currently looking for faculty positions. His research interests include: Systems (embedded and real-time systems, cyber-physical systems, operating systems), computer architecture and compilers. More information about his research can be found at: http://sibin-research.blogspot.com