Abstract: Computer architectural design has traditionally focused on improving the average-case
performance, not time predictability. As a result, some architectural features such as caches, branch
prediction, and speculative execution are harmful to time predictability, making accurate worst-case
execution time analysis very complicated if not impossible. The recent trend in multicore processor
design with shared caches and busses further complicates the worst-case execution time analysis.
Therefore, it becomes important to design time-predictable processors to reduce the complexity
of worst-case timing analysis while keeping high performance for hard real-time and safety-critical
systems.

In this talk, I will introduce two of my recent works in exploring time-predictable cache architectures
for multicore processors and the study of a metric for evaluating architectural time predictability. In the
first work, we have comparatively evaluated four cache architectures, including separated L2 caches,
partitioned L2 caches, a prioritized L2 cache, and a prioritized-partitioned L2 cache for a dual-core
processor. We find that the prioritized-partitioned L2 cache can make a better tradeoff between time
predictability and performance for both real-time and non-real-time threads. In the second work, we
introduce the concept of architectural time predictability (ATP), which separates timing uncertainty
concerns caused by hardware from software. We then propose a metric called Architectural Time-
predictability Factor (ATF) to measure architectural time predictability. Our evaluation on a Very Long
Instruction Word (VLIW) processor indicates that ATF is an effective metric to quantitatively evaluate
architectural time predictability of a whole processor as well as its architectural and microarchitectural
components such as caches, branch prediction, speculative execution, parallel pipelines, and Scratch-
Pad Memory (SPM). Thus ATF can be used to quantitatively guide architectural design for enhancing
time predictability or making better trade-offs between performance and time predictability.