Scaling the three performance-limiting walls

The Cell Broadband Engine overcomes three important limiters of contemporary microprocessor performance: power use, memory use, and processor frequency.

• Scaling the power-limitation wall
  Increasingly, microprocessor performance is limited by achievable power dissipation rather than by the number of available integrated-circuit resources (transistors and wires).
• Scaling the memory-limitation wall
  On multi-gigahertz symmetric multiprocessors (even those with integrated memory controllers) latency to DRAM memory is currently approaching 1,000 cycles.
• Scaling the frequency-limitation wall
  Conventional processors require increasingly deeper instruction pipelines to achieve higher operating frequencies. This technique has reached a point of diminishing returns – and even negative returns if power is taken into account.
• How the Cell Broadband Engine overcomes performance limitations
  By optimizing control-plane and data-plane processors individually, the Cell Broadband Engine alleviates the problems posed by the power, memory, and frequency limitations.