The PPE communicates with the SPEs through privileged-state and problem-state MMIO registers supported by the MFC of each SPE.
These registers are accessed by the associated SPE through its channel mechanism (seeChannels), which consist of unidirectional registers and queues and support logic. The three primary communication mechanisms between the PPE and SPEs are mailboxes, signal notification registers, and DM)
Name | Channel | MMIO Register | ||||||
---|---|---|---|---|---|---|---|---|
Mnemonic | Max. entries | R/W | Width (bits) | Mnemonic | Max. entries | R/W | Width (bits) | |
SPU Write Outbound Mailbox | SPU_WrOutMbox | 1 | W | 32 | SPU_Out_Mbox | 1 | R | 32 |
SPU Read Inbound Mailbox | SPU_RdInMbox | 4 | R | 32 | SPU_In_Mbox | 4 | W | 32 |
SPU Write Outbound Interrupt Mailbox | SPU_WrOutIntrMbox | 1 | W | 32 | SPU_Out_Intr_Mbox | 1 | R | 32 |
SPU signal-notification channels are inbound (to an SPE) 32-bit registers. They can be configured for one-to-one signaling or many-to-one signaling. An SPE read of one of its two signal-notification channels clears the channel. A PPE MMIO read does not clear the channel. Table 2 lists the signal-notification channels and associated MMIO registers.
Name | Channel | MMIO Register | ||||||
---|---|---|---|---|---|---|---|---|
Mnemonic | Max. entries | R/W | Width (bits) | Mnemonic | Max. entries | R/W | Width (bits) | |
SPU Signal Notification 1 | SPU_RdSigNotify1 | 1 | R | 32 | SPU_Sig_Notify_1 | 1 | R/W | 32 |
SPU Signal Notification 2 | SPU_RdSigNotify2 | 1 | R | 32 | SPU_Sig_Notify_2 | 1 | R/W | 32 |
The PPE is often used as an application controller, managing and distributing work to the SPEs. A large part of this task is loading main storage with the data to be processed, and then notifying the SPE by either writing to the SPU Read Inbound Mailbox or writing to one of the SPE's signal notification registers.
Mailboxes are also useful when the SPE places computational results in main storage via DMA. After requesting the DMA transfer, the SPE waits for the DMAs to complete, and then writes to an SPU Write Outbound Mailbox to notify the PPE that its computation is complete. The PPE can use either a mailbox or a signal to let an SPE know that the PPE has placed computational results in main storage via DMA.