SPU C/C++ language extensions (intrinsics)

A large set of SPU C/C++ language extensions (intrinsics) make the underlying SPU Instruction Set Architecture and hardware features conveniently available to C programmers. These intrinsics can be used in place of assembly-language code when writing in the C or C++ languages.

The intrinsics are essentially in-line assembly-language instructions in the form of C-language function calls. They provide the programmer with explicit control of the SPE SIMD instructions without directly managing registers. A well-written compiler that supports these intrinsics will emit efficient code for the SPE architecture. The techniques used by compilers to generate efficient code include:

• Register coloring
• Instruction scheduling (dual-issue optimization)
• Data loads and stores
• Loop blocking, fusion, unrolling
• Correct up-stream placement of branch hints
• Literal vector construction

For example, an SPU compiler provides the intrinsic t = spu_add(a, b) as a substitute for the assembly-language instruction fa rt,ra,rb . The compiler will generate a floating-point add instruction (fa rt, ra, rb) for the SPU intrinsic t = spu_add(a, b), assuming t , a , and b are vector float variables. The system header file (spu_intrinsics.h) defines the SPU language extension intrinsics.

The intrinsics are defined fully in the C/C++ Language Extensions for Cell Broadband Engine Architecture specification. The PPU and the SPU instruction sets have similar, but distinct, SIMD intrinsics. It is important to understand the mapping between the PPU and SPU SIMD intrinsics when developing applications on the PPE that will eventually be ported to the SPEs.

1. Assembly language versus intrinsics comparison: an example
   The ease of implementing a DMA transfer using intrinsics versus assembly-language instructions is illustrated in the example-implementation of the dma_transfer subroutine that is provided in this section.
2. Intrinsic classes
   SPU intrinsics are grouped into the three classes that are described in this section.
3. Promoting scalar data types to vector data types
   The SPU loads and stores one quadword at-a-time. When instructions use or produce scalar operands (including addresses), the value is kept in the preferred scalar slot of a SIMD register.
4. Differences between PPE and SPE SIMD support
   This section describes the architectural and language-extension differences between PPE and SPE SIMD support.
5. Compiler directives
   Like compiler intrinsics, compiler directives are crucial programming elements.