CSR: Medium: Collaborative Research: Providing Predictable
Timing for Task Migration in Embedded Multi-Core Environments
(TiME-ME)
- funded by: NSF
(award abstract)
- funding level: $390,000 (for NCSU), $335,000 (for PSU), $305,000 (for SIU)
- duration: 09/01/2009 - 08/31/2013 (no-cost extension until 08/31/2014)
- PIs: Frank Mueller, Yuan
Xie (Penn State),
Harini
Ramaprasad (Southern Illinois Univ.)
Assuring deadlines of embedded tasks for contemporary multicore
architectures is becoming increasingly difficult. Real-time scheduling
relies on task migration to exploit multicores, yet
migration actually reduces timing predictability due to cache warm-up
overheads and increased interconnect traffic.
We promote a fundamentally new approach to increase the
timing predictability of multicore architectures aimed at task
migration in embedded environments making
three major contributions.
1. We develop novel strategies to guide migration based on
cost/benefit tradeoffs exploiting both static and
dynamic analyses.
2. We devise mechanisms to increase timing predictability under task
migration providing explicit support for proactive and reactive
real-time data movement across cores and their caches.
3. We promote rate- and bandwidth-adaptive mechanisms
as well as monitoring capabilities to increase predictability under
task migration.
Our work aims at initiating a novel research direction investigating
the benefits of interactions between hardware and software for
embedded multicores with respect to timing predictability.
This project fundamentally contributes to the research and educational
infrastructure for the design and development of safety- and
mission-critical embedded systems.
Publications:
-
"CheckerCore: Enhancing an FPGA Soft Core to Capture Worst-Case Execution Times"
by Jin Ouyang, Raghuveer Raghavendra, Sibin Mohan, Tao Zhang, Yuan Xie and Frank Mueller in
Conference on Compiler, Architecture and Synthesis on Embedded
Systems (CASES'09), Oct 2009.
-
Policies for Migration of Real-Time Tasks in Embedded Multi-Core Systems
by K. Katre, H. Ramaprasad, A. Sarkar, F. Mueller
, refereed work-in-progress RTSS, Dec 2009.
-
Making DRAM Refresh Predictable
by B. Balasubramanya, F. Mueller
, Euromicro Conference on Real-Time Systems (ECRTS), Jul 2010.
-
"Predictable Task Migration for Locked Caches in Multi-Core Systems" by
A. Sarkar, F. Mueller and H. Ramaprasad
in ACM SIGPLAN Conference on Languages, Compilers, and Tools for
Embedded Systems, Jun 2011, pages 131-140.
-
"Static Task Partitioning for Locked Caches in Multi-Core Real-Time Systems"
by A. Sarkar, F. Mueller, and H. Ramaprasad"
in TR 2011-11, Dept. of Computer Science, North Carolina State
University, Mar 2011.
-
"A Fault Observant Real-Time Embedded Design for Network-on-Chip
Control Systems"
by C. Zimmer and F. Mueller"
in TR 2011-13, Dept. of Computer Science, North Carolina State
University, Jun 2011.
-
"Making DRAM Refresh Predictable"
by B. Bhat, F. Mueller
in Real-Time Systems Journal, Vol. 47, No. 5, Sep 2011, pages 430-453.
-
"Low Contention Mapping of Real-Time Tasks onto a TilePro 64 Core Processor",
by C. Zimmer and F. Mueller
in Real-Time and Embedded Technology and Applications Symposium, Apr
2012, pages 131-140.
-
"Fault Resilient Real-Time Design for NoC Architectures",
by C. Zimmer and F. Mueller
International Conference on Cyber-Physical Systems, Apr 2012, pages 75-84.
-
"Semi-Partitioned Hard-Real-Time Scheduling Under Locked Cache
Migration in Multicore Systems"
by M. Shekhar, A. Sarkar, H. Ramaprasad,
F. Mueller, Euromicro Conference on Real-Time Systems (ECRTS),
Jul 2012, pages 331-340.
-
"Static Task Partitioning for Locked Caches in Multi-Core Real-Time Systems"
by A. Sarkar, F. Mueller and H. Ramaprasad in
Conference on Compiler, Architecture and Synthesis on Embedded
Systems (CASES'12), Oct 2012.
-
Highly Efficient and Predictable Group Communication over Multi-core NoCs
by K. Yanga, F. Mueller
, refereed work-in-progress RTAS, Apr 2013.
Theses:
-
"Predictable Task
Migration Support and Static Task Partitioning for Scalable
Multicore Real-Time Systems"
by A. Sarkar, Ph.D. Thesis, North Carolina State
University, May 2012 (last known position: Intel, CA)
-
"Bringing Efficiency and Predictability to Massive Multi-core NoC Architectures"
by C. Zimmer, Ph.D. Thesis, North Carolina State
University, Dec 2012 (last known position: Cisco, NC)
-
"Collective Communication
for Multi-core NOC Interconnects" by Karthik
Yagna, M.S. Thesis, North Carolina State University, May 2013
(last known position: Riverbed technologies, CA)
-
"Distributed Job Allocation for Large-Scale Many-cores"
by Subramanian Ramachandran, M.S. Thesis, North Carolina State University, May 2014
(last known position: Riverbed, CA)
-
"Effcient and Lightweigth
Inter-process Collective Operations for Massive Multi-core Architectures"
by Onkar Patil, M.S. Thesis, North Carolina State University, Jun 2014
(last known position: NetApp, NC)
"This material is based upon work supported by the National Science Foundation under Grant No. 0905181."
"Any opinions, findings, and conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the views of the National Science Foundation."